TOWARDS HYBRID CONTROL-FLOW AND DATAFLOW ARCHITECTURES

Authors

  • Nenad Korolija School of Electrical Engineering, University of Belgrade
  • Vladisav Jelisavčić Mathematical Institute of the Serbian Academy of Sciences and Arts, Kneza Mihaila 36, 11001 Belgrade, Serbia
  • Zlatogor Minchev Institute of Information and Communication Technologies, Bulgarian Academy of Sciences, Sofia, Bulgaria
  • Veljko Milutinović Department of Computer Science, University of Indiana in Bloomington, Luddy Hall 2062, 700 N. Woodlawn Avenue Bloomington, IN 47408, Indiana, USA

Keywords:

high performance computing, dataflow architectures, control-flow architectures, job scheduling

Abstract

Purpose

High performance computing algorithms are often programmed solely for a single type of computer architecture. Some algorithms are more suitable for dataflow architectures, while others are scalable when executed using control-flow architectures. Increasing number of transistors on a single chip die creates the opportunity to combine multiple computing paradigms on a single chip. This allows faster communication between them and therefore faster algorithm execution.

Design/Methods/Approach

This manuscript advocates for a hybrid control-flow and dataflow architecture on a single chip. Explanation of these architectures is followed by the design of the hybrid processor. The evaluation is based on the simulator of jobs executed on the proposed hybrid processor, dataflow architecture, and control-flow architecture.

Findings

Simulation comparison reveals the acceleration possibilities for certain high performance computing algorithms when executed using the proposed hybrid architecture. This can improve video surveillance in terms of better real-time face recognition, but also in terms of tracking subjects based on video streams from multiple locations, reducing the total power consumption at the same time.

Originality/Value

The proposed computer architecture isn’t commercially available. However, with increasing number of transistors per chip, it is justified to combine existing computing paradigms in order to decrease the total processing time of high performance computing algorithms. Future work includes simulating the execution of an artificial intelligence algorithm that requires communication speed between dataflow and control-flow architectures comparable to the speed of modern cache memories to prevent under-utilization of a dataflow hardware.

References

Moore, G. E. (1998). Cramming more components onto integrated circuits. Proceedings of the IEEE, 86(1), 82-85.
Trifunovic, N., Milutinovic, V., Salom, J., & Kos, A. (2015). Paradigm shift in big data supercomputing: dataflow vs. controlflow. Journal of Big Data, 2(1), 1-9.
Korolija, N., Djukic, T., Milutinovic, V., & Filipovic, N. (2013). Accelerating Lattice-Boltzman method using Maxeler dataflow approach. The IPSI BgD Transactions on Internet Research, 34.
Milutinovic, V. (1996). The best method for presentation of research results. IEEE TCCA Newsletter, (9), 1-6.
Banković, M., Filipović, V., Graovac, J., Hadži-Purić, J., Hurson, A. R., Kartelj, A., ... & Živković, M. (2020). Teaching graduate students how to review research articles and respond to reviewer comments. In Advances in Computers (Vol. 116, No. 1, pp. 1-63). Elsevier.
Milutinović, V., Furht, B., Obradović, Z., & Korolija, N. (2016). Advances in high performance computing and related issues. Mathematical problems in engineering, 2016.
Popovic, J., Bojic, D., & Korolija, N. (2015). Analysis of task effort estimation accuracy based on use case point size. IET Software, 9(6), 166-173.
Milutinovic, V., Salom, J., Veljovic, D., Korolija, N., Markovic, D., & Petrovic, L. (2017). Transforming applications from the control flow to the dataflow paradigm. In Dataflow supercomputing essentials (pp. 107-129). Springer, Cham.
Korolija, N., Popović, J., Cvetanović, M., & Bojović, M. (2017). Dataflow-based parallelization of control-flow algorithms. In Advances in computers (Vol. 104, pp. 73-124). Elsevier.
Yazdanpanah, F., Alvarez-Martinez, C., Jimenez-Gonzalez, D., & Etsion, Y. (2013). Hybrid dataflow/von-Neumann architectures. IEEE Transactions on Parallel and Distributed Systems, 25(6), 1489-1509.
Voitsechov, D., & Etsion, Y. (2015, December). Control flow coalescing on a hybrid dataflow/von Neumann GPGPU. In Proceedings of the 48th International Symposium on Microarchitecture (pp. 216-227).
Milutinović, V., Azer, E. S., Yoshimoto, K., Klimeck, G., Djordjevic, M., Kotlar, M., ... & Ratkovic, I. (2021, June). The ultimate dataflow for ultimate supercomputers-on-a-chip, for scientific computing, geo physics, complex mathematics, and information processing. In 2021 10th Mediterranean Conference on Embedded Computing (MECO) (pp. 1-6). IEEE.
Trifunovic, N., Milutinovic, V., Korolija, N., & Gaydadjiev, G. (2016). An AppGallery for dataflow computing. Journal of Big Data, 3(1), 1-30.
Milutinović, V., Trifunović, N., Korolija, N., Popović, J., & Bojić, D. (2017, November). Accelerating program execution using hybrid control flow and dataflow architectures. In 2017 25th Telecommunication Forum (TELFOR) (pp. 1-4). IEEE.
Jelisavcic, V., Stojkovic, I., Milutinovic, V., & Obradovic, Z. (2018). Fast learning of scale‐free networks based on Cholesky factorization. International Journal of Intelligent Systems, 33(6), 1322-1339.
Bhowmik, D., Garcia, P., Wallace, A., Stewart, R., & Michaelson, G. (2017). Power efficient dataflow design for a heterogeneous smart camera architecture.
Korolija, N., Bojic, D., Hurson, A. R., & Milutinovic, V. (2022). A runtime job scheduling algorithm for cluster architectures with dataflow accelerators. Advances in Computers, 201.
Huang, K., Liu, Y., Korolija, N., Carulli, J. M., & Makris, Y. (2015). Recycled IC detection based on statistical methods. IEEE transactions on computer-aided design of integrated circuits and systems, 34(6), 947-960.

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Published

2023-04-06

Issue

Section

Contemporary Challenges in Detecting and Proving Crime